Michael Shires

Michael Shires

Graduate student in computer engineering and business at the University of Virginia.

About

Michael Shires

I'm Michael Shires, a graduate student at the University of Virginia. I'm enrolled in a dual master's program, pursuing an MBA at the Darden Graduate School of Business and an M.S. in Computer Engineering at the School of Engineering and Applied Science.

Before this, I spent ten years in the nuclear submarine community. I trained as an Engineering Laboratory Technician (ELT) at Nuclear Power Training Unit — Ballston Spa, New York, and was then stationed on the PCU Indiana, SSN 789 in Norfolk, VA. Indiana commissioned in the fall of 2018, and we moved to Connecticut. After finishing my tour on the Indiana, I received orders to NPTU — Charleston as an instructor.

Education

Projects

Research

Profiling Framework
End-to-end framework for profiling workloads at the microarchitectural level.
Fusion Candidates
Extending Sniper with several features — upgrade to SDE 10.X / Pin 4.X for APX support, backslice recording, and more.

Coursework

LLVM APX Analysis
Using fuzzing and static analysis to evaluate LLVM's ability to take advantage of novel hardware features, with Intel APX as the test subject.
ThermalHammer
Identifying malicious DRAM access patterns that maximize temperature and reduce equipment lifespan.
DELPHI
Distributed Extremely Low Power Hardware Inference — distributing an ML model across ARM M0+ chips.
ECC in PIMeval-PIMbench
Expanding the PIM simulation framework to support error-correcting codes, with several features.
IMC Tradeoffs
Designing and evaluating IMC (SRAM PIM) tradeoffs: 6T vs. 8T bit-cells and bit-serial vs. bit-parallel compute architectures, across area, power, and latency.

Contact

Email
jrs6qe@virginia.edu
Personal
michael@mshires.net
GitHub
/MichaelShires
LinkedIn
/MichaelShires1